Easyelectronics.ru

#include "stm32f10x.h"
#include "prototype_func.h"

const uint8_t buffer[] = {0x80,0x83,0x86,0x89,0x8c,0x8f,0x92,0x95,0x98,0x9c,0x9f,0xa2,0xa5,0xa8,0xab,0xae,
0xb0,0xb3,0xb6,0xb9,0xbc,0xbf,0xc1,0xc4,0xc7,0xc9,0xcc,0xce,0xd1,0xd3,0xd5,0xd8,
0xda,0xdc,0xde,0xe0,0xe2,0xe4,0xe6,0xe8,0xea,0xec,0xed,0xef,0xf0,0xf2,0xf3,0xf5,
0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,0xfc,0xfd,0xfe,0xfe,0xff,0xff,0xff,0xff,0xff,
0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xfe,0xfd,0xfc,0xfc,0xfb,0xfa,0xf9,0xf8,0xf7,
0xf6,0xf5,0xf3,0xf2,0xf0,0xef,0xed,0xec,0xea,0xe8,0xe6,0xe4,0xe2,0xe0,0xde,0xdc,
0xda,0xd8,0xd5,0xd3,0xd1,0xce,0xcc,0xc9,0xc7,0xc4,0xc1,0xbf,0xbc,0xb9,0xb6,0xb3,
0xb0,0xae,0xab,0xa8,0xa5,0xa2,0x9f,0x9c,0x98,0x95,0x92,0x8f,0x8c,0x89,0x86,0x83,
0x80,0x7c,0x79,0x76,0x73,0x70,0x6d,0x6a,0x67,0x63,0x60,0x5d,0x5a,0x57,0x54,0x51,
0x4f,0x4c,0x49,0x46,0x43,0x40,0x3e,0x3b,0x38,0x36,0x33,0x31,0x2e,0x2c,0x2a,0x27,
0x25,0x23,0x21,0x1f,0x1d,0x1b,0x19,0x17,0x15,0x13,0x12,0x10,0x0f,0x0d,0x0c,0x0a,
0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x03,0x02,0x01,0x01,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x02,0x03,0x03,0x04,0x05,0x06,0x07,0x08,
0x09,0x0a,0x0c,0x0d,0x0f,0x10,0x12,0x13,0x15,0x17,0x19,0x1b,0x1d,0x1f,0x21,0x23,
0x25,0x27,0x2a,0x2c,0x2e,0x31,0x33,0x36,0x38,0x3b,0x3e,0x40,0x43,0x46,0x49,0x4c,
0x4f,0x51,0x54,0x57,0x5a,0x5d,0x60,0x63,0x67,0x6a,0x6d,0x70,0x73,0x76,0x79,0x7c};

int main()
{   
     uint8_t  i=0;
   
    /****     Clock   Initialization         ****/
    RCC_Init();                                                                   // Clock enable, PLL  x 3
    RCC->APB1ENR|= (uint32_t)(RCC_APB1ENR_DACEN );   // DAC Clock enable
    RCC->APB2ENR|= (uint32_t)(RCC_APB2ENR_IOPAEN);   // I/O PORTA Clock enable
         RCC->AHBENR |= RCC_AHBENR_DMA1EN;                     // DMA Clock enable


        /****     PORT   Initialization          ****/
    GPIOA->CRL=0x00;                   // Analog
   
    /****     DAC   Initialization           ****/
      DAC->CR |=(uint32_t)(DAC_CR_EN1|DAC_CR_BOFF1|DAC_CR_DMAEN1|DAC_CR_DMAEN2);
    //DAC->CR |=(uint32_t)(DAC_CR_EN2|DAC_CR_BOFF2|DAC_CR_MAMP2|DAC_CR_WAVE2_1|DAC_CR_TSEL2);
    //DAC->SWTRIGR|=(DAC_SWTRIGR_SWTRIG1|DAC_SWTRIGR_SWTRIG2);

    /****     DMA   Initialization           ****/
     DMA1_Channel3->CPAR =   DAC->DHR8R1;
     DMA1_Channel3->CMAR =   buffer[0];
     DMA1_Channel3->CNDTR = (sizeof(buffer)/sizeof(buffer[0]));
     DMA1_Channel3->CCR=0x00;
   
     DMA1_Channel3->CCR = (DMA_CCR1_MINC | DMA_CCR1_CIRC | DMA_CCR1_DIR );
     DMA1_Channel3->CCR|= DMA_CCR1_EN;
   
    while(1)
    { 
       i++;
         if(i==(sizeof(buffer)/sizeof(buffer[0])))
      {
         i=0;
      }
       DAC->DHR8R1=buffer[i];
   
      // DAC->SWTRIGR|=(DAC_SWTRIGR_SWTRIG1|DAC_SWTRIGR_SWTRIG2);
   //   delay_ms(1);
    }
}

void delay_ms(uint16_t time)
{
    volatile uint32_t i;

    while (time-- > 0)
    {
        i = 30;
        while (i-- > 0)
        {
        }
    }
}